Rₖ(θ) = exp(−iθσₖ/2); CP(θ) = diag(1, 1, 1, eⁱᶿ); CZ = CP(π).
Assumptions and limits
- Ideal one- or two-qubit pure-state model. The remaining nodes show connectivity only; there is no 108-qubit state simulation, leakage, crosstalk, noise or calibrated pulse simulation.
- Schematic distances and chiplet gaps have no physical length unit. A node represents a programmable qubit; a line represents a connection. Heavy-lattice midpoint nodes are qubits.
- Cepheus 108Q topology is transcribed from the user-supplied 108Q Spec Sheet - April 2026.pdf, page 3: row-major qubits 0–107, 195 connections. Page 1 lists 216 tunable couplers: 18 coupler elements on each of twelve chiplets, 21 of them on the array edge with no partner chiplet, so 195 connected pairs. That reading reconciles the two figures but is an inference, not a vendor statement; no edges are invented and no live device map is claimed.
- Novera 9Q (rigetti.com/novera, checked 9 September 2026): one 3×3 chip, 12 tunable couplers, typical medians T1 32 µs, T2 26 µs, 99.9 % one-qubit and 99.6 % two-qubit gates. The 97.96 % readout figure is one example qubit in the March 2025 Zurich Instruments bring-up note; 40 ns and 200 ns gate durations are unverified scenario values of the fake-backend model.
- Cepheus-1-36Q (system card, checked 9 September 2026): four 9-qubit chiplets, T1 32 µs, T2 18 µs, 99.9 % one-qubit, 99.5 % CZ; median CZ time 76 ns from the 2025 Form 10-K; 40 ns one-qubit time assumed; readout borrowed from Novera. Cepheus-1-108Q (April 2026 sheet): T1 25 µs, T2 10 µs, 99.6 % one-qubit simultaneous or 99.87 % isolated, 99.1 % CZ, 95.5 % readout, RX/RY 40 ns, CZ 60 ns, native angles π and ±π/2, RZ virtual. None of these numbers enter the ideal model; animation speed is unrelated to gate time.
- Numbering: ids are grid-major, row by row. Novera ids equal the fake-backend model. The 36Q backend counts chip-major, chip × 9 + local with chip = 2⌊r/3⌋ + ⌊c/3⌋. The 108Q ids equal the page-3 labels of the sheet through the backend’s sheet_label map.
- Continuous RX/RY angles and CP(θ) are mathematical controls. The April native RX/RY angles are π and ±π/2; general rotations require synthesis. RZ is a virtual phase update. H denotes an ideal basis change.
- Comparison patches differ in size and boundary shape; their graph statistics alone do not rank processor performance. Heavy-square is a research construction, not a claim about a current IBM QPU.
Sources · 12 references
- AWS and Rigetti · Cepheus-1-108Q architecture1 June 2026. Twelve 9-qubit square-lattice chiplets, tunable/intermodule couplers and native CZ. Current calibration requires device properties.
- Rigetti · Novera QPUChecked 9 September 2026. 3×3 array of tunable transmons, a tunable coupler between each adjacent pair (12); typical medians T1 32 µs, T2 26 µs, 99.9 % single-qubit and 99.6 % two-qubit gates.
- Rigetti · System cards (What we build)Checked 9 September 2026. Cepheus-1-36Q, deployed 12 August 2025: T1 32 µs, T2 18 µs, 99.9 % single-qubit, 99.5 % CZ. Cepheus-1-108Q, deployed 7 April 2026: T1 25 µs, T2 10 µs, 99.1 % CZ.
- Rigetti · 2025 Form 10-KFiled 4 March 2026. Cepheus-1-36Q is four 9-qubit chiplets tiled together; 99.6 % median two-qubit fidelity by January 2026 (internal testing); median CZ gate time 76 ns.
- Rigetti and Zurich Instruments · Novera bring-up13 March 2025. One example qubit (Q3): T1 45.9 µs, T2 echo 25.5 µs, 99.51 % single-qubit gate and 97.96 % readout assignment fidelity; no two-qubit fidelity reported.
- Gold et al. · Entanglement across separate silicon diesnpj Quantum Information 7, 142 (2021); arXiv 2102.13293. Two-qubit gates across a die boundary in a multi-die superconducting device: the modular idea behind chiplet tiling.
- IBM · The heavy-hex lattice7 July 2021. Hexagonal arrangement with an additional qubit on each edge; historical connectivity tradeoffs.
- IBM · Processor familiesChecked 5 September 2026. Heron uses heavy-hex; Nighthawk uses grid connectivity.
- IBM · Nighthawk r231 August 2026. Square lattice: 120 programmable qubits, 218 couplers and 120 reset elements. The 458 physical elements are not 458 programmable qubits.
- Chamberland et al. · Heavy-hexagon and heavy-square codesPhysical Review X 10, 011022, 31 January 2020. Low-degree graph constructions with data and ancilla qubits.
- Koch et al. · Transmon designPhysical Review A 76, 042319, 12 October 2007. Reduced charge sensitivity with retained anharmonicity.
- Rigetti · Novera QPU: 5-qubit test chipChecked 13 September 2026. "5 superconducting fixed frequency qubits, without interactions between qubits"; separate and independently addressable; no tunable couplers or qubit-qubit coupling; for testing single-qubit operations. No arrangement published.